400Mbit/s IEEE1394a high performance bus communication board

(jpeg-file, 18 x 12 cm,
160 dpi, 156 K)

high-performance bus communication board for professional industrial and consumer electronics network applications
fully IEEE1394a compliant
capacitive isolation barier between cable and system environment according to IEEE 1394-1995 standard
can be designed into an existing processor system as a peripheral component
parallel operation of several micro-line® boards with piggy back system
Technical Data
Board definition micro-line® SC1394a
Transmission Rates 100Mbit/s, 200Mbit/s, 400 Mbit/s, IEEE 1394a compliant
IEEE 1394 Ports 3
IEEE 1394 silicon Texas Instruments TSB12LV32 GP Lynx II Link-Layer-Controller

Texas Instruments TSB41AB3 400Mbit/s Physical-Layer-Transceiver
Asynchronous Interface 16- /32 Bit wide Link-Layer-Controller Interface to the micro-line® bus

Asynchronous data transfer management via polling or signal line READY
Isochronous Interface

4k x 16-bit wide FIFO

Polling, interrupt- and DMA- capable

32-bit micro-line® interface
to the isochronous FIFO

System Interface micro-line® bus
Power Concept

3.3V till 5V supply from micro-line® carrier system for processor and Link-Layer components

Physical-Layer (3.3V) supplied by the IEEE-1394 cable (between 8V and 30V) or by an additional isolated voltage from the micro-line® carrier system

Different IEEE 1394-1995 /1394a power concepts can be configured

Isolation Capacitive isolation barrier between cable environment / PHY and Link-Layer circuits of the micro-line® SC1394a

Isochronous and asynchronous data transfer

Based on improved Texas Instruments LynxCore

Isochronous Cycle Master capable

Isochronous Resource Manager capable

Bus Manager capable

Dimensions 120 mm x 67 mm (4.73 x 2.64 in)

To view
Technical Data Sheets

technical Data Sheet
micro-line® SC1394a

PDF 624Kbyte

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