![]() |
![]() |
(jpeg-file, 1024 x
768, 209 K) |
Board definition |
micro-lineŽ C6713CPU |
CPU | TMS320C6713 |
Maximum CPU Performance |
2400 MIPS (Million Instruction Operations Per Second) |
Available Clocks | 300 MHz |
FPGA | Xilinx SPARTAN 3 with 400 kGates or 1 MGates, Speedgrade 5 |
Available RAM (type/size) | SDRAM 64 Mbytes (128 Mbytes on request) |
Available Boot Flash | 2 Mbytes |
Common micro-line® Interfaces |
RS232 with line drivers for communication with PC and for other application
purposes, up to 921600 baud (supported with the default FPGA
code) micro-lineŽ 32 Bit wide data bus with 7 decoded /CS lines and configurable timing for glueless adaptation of external peripheral devices (supported with the default FPGA code) JTAG emulator interface for debugging and downloading purposes of DSP and FPGA |
Specific Interfaces |
2 Multi-channel Buffered Serial Ports (McBSP) |
Dimensions | 98 mm x 67 mm x 20 mm / 3.85 in x 2.64 in x 0.78 in |
CPU and Board Features | 4 Kbytes on-processor L1P program
cache 4 Kbytes on-processor L1D data cache 64 Kbytes on-processor L2 cache 192 Kbytes on-processor L2 fast SRAM 2 timers |
Common micro-line® Features | Resident
file system software manages up to 1023 DSP user programs or FPGA
design files on the onboard flash
memory Various, universal interfaces for many custom specific applications All important pins of the DSP and FPGA are wired to external micro-line® interface connectors Analog data acquisition peripheral boards like ORS112, ORS114 or ORS116 available Ethernet interface board SC100BaseTx available |
Development support packages: |
-
DSP Development Kit - FPGA Development Package - Software Development Tools |
To view technical data sheets ![]() |
Download
micro-lineŽ C6713CPU Hardware
Reference Guide (Revision 1.1) Download
micro-lineŽ C6713CPU Busmaster Board Support Package User Guide (Revision 1.1) |
For more information about the micro-lineŽ C6713CPU and pricing details:
|
For more information about Texas Instruments DSPs: |
![]() |