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Board definition	micro-line® C6412Compact cost efficient, high performance 32/64-bit fixed point DSP board with Xilinx SPARTAN 3 FPGA, 10/100Base-T Ethernet, 480 MBit/s USB 2.0 device interface, dual 400 MBit/s IEEE1394a (FireWire®) interfaces, and HPI / PCI interface
CPU	TMS320C6412
Maximum CPU Performance	4800/5760 MIPS (Million Instructions Per Second)
Available Clocks	600/720 MHz
FPGA	Xilinx SPARTAN 3 with 1 MGates up to 5 MGates, Speedgrade 5
Available RAM (type/size)	SDRAM 64 Mbytes, 128 Mbytes
Available Boot Flash	8 Mbytes, 32 Mbytes
Common micro-line® Interfaces	RS232 with line drivers for communication with PC and for other application purposes, up to 921600 baud 7 parallel bus I/O interfaces with configurable timing for glueless adaptation of external peripheral devices (including 7 decoded /CS lines in standard FPGA configuration) micro-line® 16/32/64 bit wide data bus with address and control lines for external piggy back expansions (in standard FPGA configuration) JTAG emulator interface for debugging and downloading purposes
Specific Interfaces	10/100Base-T Ethernet with full software support 480 MBit/s USB 2.0 slave interface with full software support dual 400 MBit/s IEEE1394a (FireWire®) interfaces with 2 separate IEEE1394a controllers for simultaneous data streaming in/out or other dual 1394-interface applications. Full software support for DCAM camera applications or individual data communication 16/32-bit wide Host Port Interface (HPI) with data, address and control lines for external host processor connectivity, alternatively configurable as 33/66 MHz PCI master / slave interface, conforming to PCI specification 2.2 2 Multi-channel Buffered Serial Ports (McBSP) synchronous serial interfaces I²C interface Up to 218 user configurable and individually VHDL programmable FPGA digital I/O pins
Dimensions	120 mm x 72 mm x 20 mm / 4.72 in x 2.83 in x 0.78 in
CPU and Board Features	64-bit wide databus between DSP, SDRAM and FPGA enables excellent data bandwidth between major data sources/sinks 16 Kbytes on-processor L1P program cache 16 Kbytes on-processor L1D data cache 256 Kbytes on-processor fast L2 SRAM / Cache 3 timers 64 EDMA channels 2 general purpose digital I/O lines XF0, XF1 Onboard watchdog Onboard temperature sensor Single 3.3V power supply Booting from Flash memory or Host Port Onboard power management and power monitoring system IEEE1394 DCAM Video Processing Development Kit with DCAM software driver available Several development kits allow various application solutions off the shelf. All development kits allow individual DSP and FPGA programming.
Common micro-line® Features	Resident File system software manages up to 1023 DSP user programs or FPGA design files on the onboard flash memory Various, universal interfaces for many custom specific applications All important pins of the DSP and FPGA are wired to external micro-line® interface connectors Analog data acquisition peripheral boards like ORS112, ORS114 or ORS116 available
Development support packages	- DSP Development Kit (no IEEE1394 support) - IEEE1394 Development Kit - DCAM Video Processing Development Kit - DCAM Frame Capture Development Kit - FPGA Development Option - Ethernet Software Development Option - USB Software Development Option (bulk transfers) - USB Software Development Option (COM port emulation) - Software Development Tools
To view technical data sheets	Download micro-line® C6412Compact Hardware Reference Guide (Revision 0.9) PDF 1.8 Mbyte Download micro-line® C6412Compact Busmaster Board Support Package User Guide (Revision 1.1) PDF 0.9 Mbyte

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